AI Chip Design

Artificial intelligence (AI) and semiconductor technology are converging at a rapid pace. Powerful AI applications require specialized chips. At the same time, AI is opening up new ways to design these chips more quickly, efficiently, and securely. The Fraunhofer Institute for Applied Solid State Physics IAF focuses precisely on this intersection and pursues a software-hardware co-design approach:

• AI for Chips – AI-supported design methods automate complex design processes, shorten development times, and improve the quality of CMOS (Complementary Metal-Oxide-Semiconductor) circuits. To this end, AI-based EDA (Electronic Design Automation) tools are being specifically developed
• Chips for AI – specialized CMOS technology for AI hardware architectures executes AI algorithms in an energy-efficient, robust, and secure manner – from classic AI accelerators to neuromorphic systems.

Activities in the field of AI chip design are being pursued at the Fraunhofer IAF branch office at the Innovation Park for Artificial Intelligence (IPAI) in Heilbronn. Here, AI-based CMOS design and specialized AI hardware are being developed in collaboration with partners and put into practice. With its recently launched activities in Heilbronn, the Fraunhofer IAF is pursuing a clear strategy: The location is to develop into a hub for AI-based CMOS design and AI hardware. The establishment of a Fraunhofer Research and Innovation Center complements a state-funded project. Together, these two initiatives by Fraunhofer IAF form the starting point for establishing an ecosystem that brings together research, industry, SMEs, and startups and empowers them in this important field of technology.