Multi-Project Wafer Runs

Multi-Project Wafer Runs and Dedicated Wafer Runs for Transistors and Integrated Circuits (ICs)

 

Based on our epitaxial and technological capabilities, Fraunhofer IAF offers electronic multi-project wafer runs (MPW) and complete mask processing for external customers. Both front and back side processing is possible. The runs are offered on a regular basis every four months. For further information about the timing of our wafer runs feel free to contact us.  

The IC designs are processed on four-inch wafers including all process steps, the full back side process, measurement technology, inspection and dicing. The design work can also be commissioned at Fraunhofer IAF.

Access is supported by process design kits (PDKs) in the Keysight design environment ADS after completion of an NDA and checking the availability and discussing your individual requirements of the ICs to be designed.

 

We offer the following technologies:  

 

Technology Gate length Features
Metamorphic mHEMT IC Process M40 50 nm InAlAs/InGaAs grounded coplanar IC process on GaAs substrates with fT = 375 GHz
GaN50 HEMT 500 nm AlGaN/GaN on s.i. SiC HEMT power bar and IC process for frequencies up to ca. 6 GHz in microstrip line technology
GaN25 HEMT 250 nm AlGaN/GaN on s.i. SiC HEMT power bar and IC process for frequencies up to ca. 20 GHz in microstrip line technology
GaN10 HEMT 100 nm AlGaN/GaN HEMT IC process in microstrip line and grounded coplanar waveguide technology for frequencies up to 94 GHz

 

© Fraunhofer IAF

Power amplifier (GaN – 100 nm).
© Fraunhofer IAF

Power amplifier (GaN – 100 nm).

Low-noise amplifier (mHEMT – 50 nm).
© Fraunhofer IAF

Low-noise amplifier (mHEMT – 50 nm).